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| Integrated Circuits Inc. AP8821 APLUS MAKE YOUR PRODUCTION A-PLUS VOICE OTP IC AP8821 - 21 VOICE OTP APLUS INTEGRATED CIRCUITS INC. Sales E-mail: Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. (115) 32 3 10. TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 WEBSITE : http: //www.aplusinc.com.tw sales@aplusinc.com.tw Technology E-mail: service@aplusinc.com.tw 1 Integrated Circuits Inc. AP8821 21 sec VOICE OTP Features 21 Sec Voice Length at 6 KHz Combination of voice building blocks extends the duration of playback Voice data re-use saves memory space Maximum 14 voice groups 4 trigger pins, S1 to S4 for the 4 voice groups ( group1 ~ 4 ) SBT for sequential playblack for the rest of voice groups & CPU mode trigger CPU trigger mode for all 14 voice groups Holdable, Unholdable, Edge, Level triggering option Debounce time : 21ms ( Key mode ) / 85us (CPU mode ) - 6K sampling rate IRP interrupt pin for master reset General Description AP8821 is a high quality voice synthesizer capable of varying playback duration. A proprietary ADPCM algorithm is used. The audio message is stored in a 512K bits on-chip EPROM which can store up to 21 seconds of voice data at 6 KHz sample rate. The AP8821 eliminates the need of complicated circuitry in voice playback but still achieves high voice quality for different kind of sounds. Combinations in sections achieve longer playback duration. A pair of PWM output pins, VOUT1 and VOUT2 provides direct drive to buzzer or speaker. A current output pin, COUT, enables the device to drive a speaker through a low cost NPN transistor. No complex filtering or amplifier circuit is needed. An automatic ramp-down function eliminates undesired noise at the end of playback. 3 programmable Outputs for STP stop pulse, BUSY and LED Built-in oscillator with a single external resistor to determine the sampling rate Built-in D/A converter, EPROM ADPCM data compression provides high sound quality Optional POP noise elimination function COUT pin drives speaker with a transistor VOUT1 and VOUT2 drives buzzer or speaker directly Auto-power down 2.4V - 4.8V single power supply operation Low standby current (<5uA at 3V) Development Tools Support 2 Integrated Circuits Inc. AP8821 Group of sections The voice memory of the AP8821 can be subdivided into 126 memory blocks. Any combination of playback of these memory blocks will form an individual voice group. A maximum of 14 groups are available with triggering S1 to S4 pins together with the SBT pin sequential playback pin. Group Configuration Data within each group are combinations of different fixed memory blocks of up to 126 blocks. They are the fundamental building blocks for arranging playback without limiting sequencing. This provides flexibility and allows data to be re-used, beneficial for applications with many repeated sounds or words. An example of group configuration is illustrated below: Group no. Group 1 Group 2 Group 3 Group 4 Section entry Block 1 + Block 2 + Block 3 ....... Block 109 Block 3 + Block 2 Block 10 + Block 11 + Block 12 Block 10 + Block 10 + Block 5 The entries of blocks for each group is truly random and without limitation. However, there is a limit in the total number of entries for 14 voice groups, which is 960 entries in AP8821. It is acceptable to allocate all entries into only one group or distribute out to other groups. It depends on how many groups of messages are required. Programmable Options Each groups in AP8821 can have independent options. They include: Edge or Level trigger Unholdable or Holdable trigger Re-triggerable or non-retriggerable Outputs are programmable to LED1, LED2, BUSY and STOP pulse Options that affect all voice groups are called whole chip options. They include: Key trigger mode or CPU trigger mode Ramp enable or Ramp disable 3 Integrated Circuits Inc. AP8821 Output Selections There are three independent output pins OUT1, OUT2 and OUT3, available for four combinations of LED1, LED2, STOP and BUSY signals for each voice group. OUT1 LED2 STOP LED1 LED1 OUT2 LED1 LED1 BUSY BUSY OUT3 BUSY LED2 STOP /BUSY 1. 2. 3. 4. LED1 and LED2 are complemented outputs flashing at a fix interval. STOP pulse gives a long enough positive pulse at the end of the playback for each group with option to enable or disable it. BUSY is active high depends on voice Block setting. That means BUSY signal can be set to high when some voice Blocks are being played but set to low for the others. Software Support All those Options and Output selections can be set with a dedicated OTP compiler and programmer software supplied by APLUS. Key trigger mode and CPU trigger mode In Key trigger mode, S1 to S4 will trigger four voice groups. The rest of the voice groups can only be triggered by SBT sequential trigger pin. In CPU trigger mode, binary data is input to S4~S1. A high pulse is input to SBT pin with pulse width equal to or longer than the debounce time to strobe the data to initial the playblack. Data patterns "1110" and "1111" is not allowed. Group-n Group1 Group2 Group3 Group4 Group5 Group6 Group7 Group8 S4 0 0 0 0 0 0 0 0 S3 0 0 0 0 1 1 1 1 S2 0 0 1 1 0 0 1 1 S1 0 1 0 1 0 1 0 1 Group-n Group9 Group10 Group11 Group12 Group13 Group14 X X S4 1 1 1 1 1 1 1 1 S3 0 0 0 0 1 1 1 1 S2 0 0 1 1 0 0 1 1 S1 0 1 0 1 0 1 0 1 4 Integrated Circuits Inc. AP8821 Block Diagram Absolute Maximum Rating Symbol VDD - VSS VIN VOUT T (Operating) T (Storage) Rating -0.5 ~ +5.0 VSS - 0.3 Integrated Circuits Inc. AP8821 Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name OUT3 VOUT1 VOUT2 VSS OUT1 OUT2 COUT OSC VPP S1 S2 VDD S3 S4 SBT IRP I/O/P O O O P O O O I P I I P I I I I Programmable output 3 Function PWM audio signal output 1 for buzzer & speaker PWM audio signal output 2 for buzzer & speaker Power ground Programmable output 1 Programmable output 2 Current output from internal DAC for speaker playback Oscillator resistor pin to control sampling frequency Program power, must connect to VDD when playback Trigger switch 1 / CPU Addr.1( LSB ), internal pull low, active high Trigger switch 2 / CPU Addr.2, internal pull low, active high Positive power supply Trigger switch 3 / CPU Addr.3, internal pull low, active high Trigger switch 4 / CPU Addr.4 ( MSB ), internal pull low, active high Key Sequential/CPU trigger, internal pull low, active high Interrupt to stop playback, internal pull low, active high Note: The following pins are used to program data into the memory: pin 4, 5, 6, 8, 9, 12,15 and16. 6 Integrated Circuits Inc. AP8821 DC Characteristics Symbol VDD ISB IOP VIH VIL IOH IOL ICO IOH IOL F/F Parameter Operating Voltage Standby current Operating current "H" Input Voltage "L" Input Voltage VOUT low O/P Current VOUT high O/P Current COUT O/P Current O/P high Current O/P low Current Frequency Stability Min. 2.4 Typ. 3.0 1 Max. 4.8 5 15 Unit V A Condition VDD=3.0V, I/O open VDD=3.0V, I/O open VDD=3.0V VDD=3.0V VDD=3.0V, Vout=0.3V VDD=3.0V, Vout=2.5V VDD=3.0V,VCOUT=1.0V VDD=3.0V, VOH=2.5V VDD=3.0V, VOL=0.3V Fosc(2.7V) - Fosc(3.4V) Fosc(3V) mA V V mA mA mA mA mA 2.5 -0.3 3.0 0 70 -40 -3 -8 8 3.5 0.5 -5 +5 % 7 Integrated Circuits Inc. AP8821 Timing Diagram 1. Level, Unholdable, Non-retriggerable a. Trigger is shorter than a Group output b. Trigger is longer than a Group output 2. Level Holdable a. Trigger is shorter than a Group output b. Trigger is longer than a Group output 3. Single Button Trigger(SBT), Sequential a. Level Unholdable b. Level Holdable where N is up to 14. 8 Integrated Circuits Inc. AP8821 4. Edge, Unholdable, Non-retriggerable a. Trigger is shorter than a Group output b. Trigger is longer than a Group output 5. Edge Holdable a. Trigger is shorter than a Group output b. Trigger is longer than a Group output 6. Single Button Trigger(SBT), Sequential a. Edge Unholdable b. Edge Holdable where N is up to 14. 9 Integrated Circuits Inc. AP8821 Application Circuits 1. Typical Application Fig. 1 a Fig. 1 b 2. LED Application 3. CPU Mode control Fig. 2 10 Integrated Circuits Inc. AP8821 4. AP8821 Individually key application : API8208A ALONE KEY TRIGGER APPLICATION : 11 Integrated Circuits Inc. AP8821 5. AP8821 & API8208A MCU CONTROL APPLICATION COMPARE : S4 TG1 TG2 TG3 TG4 TG5 TG6 TG7 TG8 0 0 0 1 0 0 1 1 API8208A S3 S2 0 0 1 0 0 1 1 0 0 1 0 0 1 1 0 0 S1 1 0 0 0 1 0 0 1 TG1 TG2 TG3 TG5 TG9 TG4 TG7 TG13 TG10 TG4 TG5 TG8 TG11 TG12 TG14 AP8821 ( CPU Mode ) S4 S3 S2 S1 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 0 0 1 1 0 1 1 0 1 1 0 0 1 0 0 1 0 0 1 1 0 1 0 0 0 1 1 1 1 0 1 0 1 0 1 1 1 1 0 1 SBT 12 Integrated Circuits Inc. AP8821 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name OUT1 VOUT1 VOUT2 VSS OUT2 OUT3 COUT OSC VPP S1 S2 VDD S3 S4 SBT IRP X 180 180 180 180 1600 1600 1600 1600 1600 1600 1600 1600 180 180 180 180 Y 1100 800 430 213 208 360 507 1014 1300 1800 1955 2114 2160 1932 1630 1402 Note:Substrate must be connected to VSS Pad size = 90um x 90um 13 |
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